Technology

Execution layer
Q1

Each Qblox Cluster channel runs its own Q1 sequencer. It generates, times, and shapes pulses on the FPGA with a 1 ns time grid, 4 ns parameter updates, and gapless playback.
Explore Q1
Feedback and Synchronization layer

connects every Q1 sequencer on a deterministic network. Measurement data and conditional triggers travel Cluster-wide in under 650 ns, with 2 Gb/s throughput and native QECi support.
Explore LINQ

shares a phase-aligned reference clock and synchronized start event across daisy-chained clusters, creating a single timing domain with under 1 ns inter-module skew and picosecond-level jitter.
Explore SYNQ
Precision at scale

Connect clusters to run thousands of Q1 processors as one system. A shared timing domain and instantaneous data routing maintain picosecond-level precision across the setup, providing the foundation for logical qubits.

QECi / Riverlane

Follow one syndrome through the control stack, from measurement to correction, in the full QEC loop demonstration with Riverlane’s Deltaflow 2 QEC system.

ACT

Q1 readout sequencers measure all 8 ancilla qubits simultaneously and discriminate each state in hardware.

ALIGN

SYNQ locks measurement and correction to one clock and one start event, so loop latency is a single, reproducible figure.

ADAPT

LINQ aggregates the results into a syndrome word, sends it to the decoder over QECi, and routes the correction back to the drive sequencers.

The full loop closed in 6.886 µs on Surface-17 and 11.886 µs on Surface-161.

NVIDIA NVQLink

Follow one round trip from the Cluster to the GPU and back, as demonstrated with NVIDIA NVQLink on NVIDIA RTX PRO 6000 Blackwell and NVIDIA DGX Spark.

ACT

Q1 sequence processors acquire measurement results and process them in hardware, ready for GPU-side decoding or calibration.

ALIGN

SYNQ keeps every sequencer on one clock and one start event, so the round trip to the GPU is a single, reproducible figure.

ADAPT

LINQ delivers the data to the GPU through NVQLink, where CUDA-Q runs decoding or calibration, and returns the result to the sequencers while the experiment runs.

Measured round-trip latency was below 4.0 µs on RTX PRO 6000 Blackwell and below 7.2 µs on DGX Spark.

Quantum hardware companies.

Every added qubit should add hardware, not a control redesign. Q1 keeps the per-channel footprint small, Clusters extend the same clock and feedback network linearly, and open interfaces let your own compiler and decoder drive the stack with no lock-in.

National labs / government research.

Multi-year programs need results that reproduce run after run, and control that connects to existing HPC. Every real-time decision runs in a fixed hardware window, the QEC loop is benchmarked with Riverlane's Deltaflow 2, and NVQLink connects Q1 sequencers to GPU-accelerated decoding under CUDA-Q.

Frequently asked questions

What is Qblox's core technology?

Qblox's core technology is the real-time control architecture inside the Qblox Cluster. It has three layers: Q1, the sequence processor on every channel; SYNQ, the Cluster-wide timing protocol; and LINQ, the deterministic feedback network connecting every Q1 sequencer.

What is the difference between Q1, SYNQ, and LINQ?

Q1 is the execution layer: it generates, times, and shapes pulses on each sequencer. SYNQ is the timing layer: it gives every module one phase-aligned clock and one start event. LINQ is the feedback layer: it carries measurement data and conditional triggers between Q1 sequencers, Cluster-wide.

How do Q1, SYNQ, and LINQ work together?

A Q1 readout sequencer measures a qubit and discriminates its state in hardware. SYNQ makes that moment the same instant on every module. LINQ carries the result to any sequencer that needs it, closing the conditional operation Cluster-wide in under 650 ns.

What is the difference between real-time feedback and near-time processing?

Real-time feedback completes in hardware, inside a fixed latency budget set by the qubit's coherence time. Near-time processing runs on a classical computer between circuits, typically on millisecond timescales, for tasks such as compilation and recalibration. Qblox core technology runs the real-time loop with no host computer mid-loop.

Is Qblox's control architecture deterministic?

Yes. Every real-time decision, from pulse generation on Q1 to feedback on LINQ, runs in hardware within a fixed window that does not depend on system load. Qblox therefore states its feedback latency as a guarantee, under 650 ns fully loaded, rather than a statistical range.

Is there a limit to how far the architecture scales?

There is no fixed ceiling. Every added channel brings its own Q1, multiple Clusters daisy-chain into one continuous SYNQ timing domain, and LINQ throughput scales linearly with each added Cluster.

Does Qblox's core technology support quantum error correction?

Yes. LINQ delivers syndrome data to any QECi-compliant decoder and returns the correction to the data qubits. With Riverlane's Deltaflow 2, the full loop measured 6.886 µs on Surface-17 and 11.886 µs on Surface-161.

How much of the QEC loop latency comes from Qblox?

Qblox contributes 1.114 µs on Surface-17 (code distance 3), rising only to 1.220 µs on Surface-161 (code distance 9). The measured loop runs from simultaneous ancilla readout, through syndrome aggregation over LINQ and decoding over QECi, to the correction returned to the drive sequencers.

Which qubit platforms does the architecture support?

Superconducting qubits, spin qubits, trapped ions, neutral atoms, and color centers. Cluster modules combine to match each platform, with the same three layers throughout.

Can Qblox's core technology connect to HPC and GPU resources?

Yes. Q1 sequence processors connect to NVIDIA NVQLink, extending the LINQ feedback model to GPU-accelerated decoding under CUDA-Q.

Does the architecture lock me into Qblox software?

No. Qblox Scheduler compiles circuits into Q1ASM at the high level, and Qblox Instruments exposes the low-level API. Q1ASM is an open instruction set your own compiler can target, and QECi keeps the decoder choice open.

Why does the full architecture matter before I run QEC?

Q1 and SYNQ set the timing of every experiment today, and LINQ-driven active reset and qubit frequency tracking speed up experiment cycles now. The same three layers already run the full QEC loop in hardware, so the system grows into QEC without replacing control hardware.

One Deterministic Control Stack

3 hardware layers inside every Qblox Cluster

Execution layer

Feedback and Synchronization layer

Precision at scale