Qubit Readout and Control

(QRC)

The Qubit Readout and Control (QRC) module is built on advanced RFSoC technology, providing a continuous frequency range from 100 MHz to 10 GHz for the generation of all readout and control signals.

A high channel density RF solution built on a unique DDS and single mixing combination, ensuring accurate operation across the full frequency range without recalibration. Each channel provides >800 MHz instantaneous bandwidth across the entire frequency span, supporting frequency‑multiplexed readout (12 frequencies). Short rise times and low ringing deliver strong time-domain performance, while an excellent signal-to-noise ratio and low phase noise enable high-fidelity gates.

FREQUENCY:
100 MHz to 10 GHz
in - out:
6 Output | 2 Input
SEQUENCE PROCESSORS:
12
Covering 100 MHz to 10 GHz, fully independent ports generate all the necessary signals for scalable control and readout for your qubits.
Channel-independent instantaneous bandwidth of >800 MHz.
Unique DDS and single mixing combination ensure high SFDR, exceptional SNR, and full frequency range accuracy without recalibration.
Avoid delays with gapless playback and create the fastest parameter update rate of 4 ns.
Q1 real-time sequencer delivers fully deterministic, reliable performance for complex pulse sequences and measurement loops.
High-level open-source software Qblox Scheduler streamlines easy scheduling, while the assembly layer can integrate with third-party tools.

Advancing qubit readout and control

Combining the best of direct digital synthesis (DDS) and analog mixing technology, the Quantum Readout and Control (QRC) module represents a groundbreaking advancement in quantum control. By leveraging the high-frequency capabilities of DDS, the QRC eliminates the need for a second mixing stage as compared to the double super heterodyne technique (DSH), preserving the calibration-free advantage of DSH while reducing phase noise.

The QRC module ensures channel-independent frequency range coverage without gaps, providing maximum user flexibility. With its design, users can effortlessly select a primary operating frequency. The hardware will then automatically adjust the settings to provide the full bandwidth immediately available around the chosen center frequency.

Discover more in the blog

Using the QRC in the Qblox Cluster

The Qubit Readout and Control Module (QRC) operates within the Qblox Cluster mainframe, offering seamless integration and scalability. A single 19” rack Cluster unit can accommodate up to 20 QCM modules, providing density for up to 80 baseband channels.

Qblox’s modular architecture allows interoperability between the QRC and other modules, including the Qubit Control Modules (QCM and QCM-RF II), Qubit Readout Modules (QRM and QRM‑RF), and the Qubit Timetag Module (QTM). Using the proprietary SYNQ and LINQ interconnect protocols, all modules communicate and run synchronously. This architecture ensures precise alignment of control, readout, and processing, allowing users to configure a control stack that matches their quantum system and supports high‑fidelity operation.

Unique patented protocols to create scalable systems that function as a single unit

SYNQ protocol guarantees synchronization of all channels, with ps-level jitter and great phase coherence for precise qubit control and the highest fidelities.

LINQ protocol provides fast, scalable feedback with all-to-all connectivity for conditional playback and conditional branching.

Specifications

Output Channels

Output frequency range
100 MHz - 10 GHz
Number of output channels
6
Max number of carrier frequencies per output channel
8
Analog bandwidth
800 MHz
Max output power
+5 dBm
DAC vertical resolution
14 bits
DAC sampling rate
5 GSa/s
SFDR (excluding harmonics)
-50 dBc (typical)
Max output power
+5 dBm
Phase noise
-108 dBc/Hz at a 10 kHz
offset at 6 GHz
Carrier-to-noise density ratio
150 dB ⋅ Hz
Mute switch isolation
50 dB
Number of digital outputs
1

Input Channels

Input frequency range
100 MHz - 10 GHz
Number of input channels
2
Max number of carrier frequencies (total)

8
Analog bandwidth
800 MHz
Input power
-53 to +6 dBm
ADC vertical resolution
14 bits
ADC sampling rate
5 GSa/s

General Specifications

Number of pulse processing units
12 sequencer cores
Parameter update rate
(Amplitude, offset, frequency, phase)
4 ns
NCO frequency step size
0.25 Hz
Waveform and parameter granularity
1 ns
Module to module skew
<1 ns
Channel to channel skew
<600 ps
Connector type
SMA for analog outputs
SMP for digital outputs
Power supply
via Cluster mainframe
Reference clock
10 MHz via Cluster
mainframe or external
clock

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